1. Field of the Disclosure
This specification relates to a shift register, and particularly, to a shift register having a sensing circuit for quantitatively measuring a threshold voltage shifted level of a thin film transistor, which is deteriorated due to a continuously applied direct-current (DC) voltage, in a shift register having thin film transistors using oxide silicon as an active layer, and a flat panel display device having the same.
2. Background of the Disclosure
With the development of various portable devices such as mobile phones and notebook computers and information electronic devices such as HDTV for outputting images with high resolutions and high qualities, demands on flat panel display devices applied to those devices are gradually increasing. Examples of the flat panel display device include Liquid Crystal Display (LCD), Plasma Display Panel (PDP), Field Emission Display (FED), Organic Light Emitting Diode (OLED) and the like.
The flat panel display device requires a large substrate, such as glass, and a Thin Film Transistor (TFT), which is to be applied as a display device switching and driving element (component) having an excellent performance without an increase in costs. Among others, an amorphous silicon TFT (a-Si TFT) is a representative element which is widely used as an element which can be uniformly formed on a large substrate over 2 m in size with low costs.
However, with the trend of size-increases of the display device and a high image quality, high-performance elements are also required. Thus, there is a limit to using the conventional a-Si TFT, which exhibits about 0.5 cm2/Vs of mobility, as an element of a large flat panel display device.
Therefore, a high-performance TFT having mobility higher than the a-Si TFT and a fabrication technology therefor are needed. Also, the conventional a-Si TFT involves a problem in reliability, as the worst shortcoming, in that its initial performance is unable to be maintained due to its element characteristic being continuously deteriorated as it operates.
Many studies for overcoming the limit of the a-Si TFT have been continuously conducted, and a representative one is an oxide-silicon TFT.
The oxide-silicon TFT exhibits higher carrier mobility than the a-Si TFT. This may be very advantageous in implementing a driving circuit for controlling switching elements as well as the switching elements within a display panel disposed on the flat panel display device.
FIG. 1A is a schematic view showing a structure of a shift register for a flat panel display device according to the related art, and FIG. 1B is a view showing an equivalent circuit for one stage of the shift register shown in FIG. 1A.
The related art flat panel display device may include a shift register for applying gate output signals sequentially to each horizontal line of pixels on a display panel in order to display an image by sequentially turning on each pixel on the display panel.
As shown in FIG. 1A, a typical shift register includes a plurality of stages 1ST to nST for outputting output voltages Vout to gate lines formed on a display panel (not shown) in synchronization with a clock signal CLK. With the configuration, the first stage 1ST receives a start signal Vst to output a first gate output signal Vout-1 of high level for a first horizontal period 1H, and the second stage 2ST receives the first gate output signal Vout-1 as the start signal Vst to output a second gate output signal Vout-2 of high level. When the nth gate output signal Vout-n is finally output by the nth stage nST, an operation for one frame is completed.
Each of the stages 1ST to nST includes a plurality of transistors. FIG. 1B exemplarily shows one stage of a shift register having 8 transistors. As shown in FIG. 1B, one stage of the shift register includes a first transistor T1 and a sixth transistor T6 diode-connected to each other and turned on in response to a start signal Vst such that the first transistor T1 charges a Q node Q and the sixth transistor T6 discharges a QB node QB, a fifth transistor T5 turned on in response to charging of the Q node Q for discharging the QB node QB, a second transistor T2 for charging the QB node QB with a high potential driving voltage Vdd in response to a reverse clock signal CLKB, a third transistor T3 turned on in response to charging of the QB node QB for discharging the Q node Q, a fourth transistor T4 turned on in response to a reset signal RST for discharging the Q node Q and charging the QB node QB, a seventh transistor T7 electrically connected to one side of the charged Q node Q and turned on in response to the high voltage charged in the Q node Q for outputting a non-reverse clock signal CLK as an output signal Out therethrough, and an eighth transistor T8 turned on by the charged QB node QB for inducing the clock signal CLK outputted through the seventh transistor T7 to be lowered to a low potential.
As the TFT of the thusly configured shift register is implemented with oxide silicon TFTs, it is expected to highly improve performance by virtue of high mobility. However, in view of characteristics of the oxide silicon TFT, initial threshold voltage (int-threshold) characteristics are irregularly observed depending on positions, and the initial threshold voltage may be shifted on some of the TFTs. In particular, the third transistor T3 connected to the QB node QB, to which a high-level DC voltage is continuously applied for most of driving time, may be deteriorated. Accordingly, its device characteristics may change.
Consequently, the voltage level of the Q node Q connected to the third transistor T3 may be varied and thereby the gate output voltage Vout-n may not be regularly outputted due to an erroneous operation.